 |
Motorola Syntax |
In the following table, apc stands for any of the address registers
(%a0
through %a7
), the program counter (%pc
), the
zero-address relative to the program counter (%zpc
), or a
suppressed address register (%za0
through %za7
). The use
of size means one of w
or l
, and it may always be
omitted along with the leading dot. The use of scale means one of
1
, 2
, 4
, or 8
, and it may always be omitted
along with the leading asterisk.
The following additional addressing modes are understood
(note that some of them are valid only on 68020 or later processors,
not on the ordinary 68000 used in TI calculators):
- Address Register Indirect
(%a0)
through (%a7)
%a7
is also known as %sp
, i.e. the Stack Pointer. %a6
is also known as %fp
, the Frame Pointer.
- Address Register Postincrement
(%a0)+
through (%a7)+
- Address Register Predecrement
-(%a0)
through -(%a7)
- Indirect Plus Offset
number(%a0)
through number(%a7)
,
or number(%pc)
.
The number may also appear within the parentheses, as in
(number,%a0)
. When used with the pc, the
number may be omitted (with an address register, omitting the
number produces Address Register Indirect mode).
- Index
number(apc,register.size*scale)
The number may be omitted, or it may appear within the
parentheses. The apc may be omitted. The register and the
apc may appear in either order. If both apc and
register are address registers, and the size and scale
are omitted, then the first register is taken as the base register, and
the second as the index register.
- Postindex
([number,apc],register.size*scale,onumber)
The onumber, or the register, or both, may be omitted.
Either the number or the apc may be omitted, but not both.
- Preindex
([number,apc,register.size*scale],onumber)
The number, or the apc, or the register, or any two of
them, may be omitted. The onumber may be omitted. The
register and the apc may appear in either order. If both
apc and register are address registers, and the size
and scale are omitted, then the first register is taken as the
base register, and the second as the index register.