;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.6.1 #4330 (Oct 18 2006)
; This file generated Wed Oct 18 23:31:20 2006
;--------------------------------------------------------
	.module _strrchr
	.optsdcc -mhc08
	
	.area HOME (CODE)
	.area GSINIT0 (CODE)
	.area GSINIT (CODE)
	.area GSFINAL (CODE)
	.area CSEG (CODE)
	.area XINIT
	.area CONST   (CODE)
	.area DSEG
	.area OSEG    (OVR)
	.area BSEG
	.area XSEG
	.area XISEG
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _strrchr_PARM_2
	.globl _strrchr
;--------------------------------------------------------
;  ram data
;--------------------------------------------------------
	.area DSEG
;--------------------------------------------------------
; overlayable items in  ram 
;--------------------------------------------------------
	.area	OSEG    (OVR)
_strrchr_sloc0_1_0::
	.ds 2
_strrchr_sloc1_1_0::
	.ds 1
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
	.area XISEG
;--------------------------------------------------------
; extended address mode data
;--------------------------------------------------------
	.area XSEG
_strrchr_PARM_2:
	.ds 1
_strrchr_string_1_1:
	.ds 2
_strrchr_start_1_1:
	.ds 2
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area HOME (CODE)
	.area GSINIT (CODE)
	.area GSFINAL (CODE)
	.area GSINIT (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME (CODE)
	.area CSEG (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'strrchr'
;------------------------------------------------------------
;ch                        Allocated with name '_strrchr_PARM_2'
;string                    Allocated with name '_strrchr_string_1_1'
;start                     Allocated with name '_strrchr_start_1_1'
;sloc0                     Allocated with name '_strrchr_sloc0_1_0'
;sloc1                     Allocated with name '_strrchr_sloc1_1_0'
;------------------------------------------------------------
;_strrchr.c:26: char * strrchr (
;	-----------------------------------------
;	 function strrchr
;	-----------------------------------------
_strrchr:
;     genReceive
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, EXT(_strrchr_string_1_1), 0), stacked=0, isaddr=0
	sta	(_strrchr_string_1_1 + 1)
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, EXT(_strrchr_string_1_1), 1), stacked=0, isaddr=0
	stx	_strrchr_string_1_1
;_strrchr.c:31: char * start = string;
;     genAssign
;     loadRegFromAop (a, EXT(_strrchr_string_1_1), 1)
	lda	_strrchr_string_1_1
;     storeRegToAop (a, EXT(_strrchr_start_1_1), 1), stacked=0, isaddr=0
	sta	_strrchr_start_1_1
;     loadRegFromAop (a, EXT(_strrchr_string_1_1), 0)
	lda	(_strrchr_string_1_1 + 1)
;     storeRegToAop (a, EXT(_strrchr_start_1_1), 0), stacked=0, isaddr=0
	sta	(_strrchr_start_1_1 + 1)
;_strrchr.c:33: while (*string++)                       /* find end of string */
;     genAssign
;     loadRegFromAop (a, EXT(_strrchr_string_1_1), 1)
	lda	_strrchr_string_1_1
;     storeRegToAop (a, DIR(_strrchr_sloc0_1_0), 1), stacked=0, isaddr=0
	sta	*_strrchr_sloc0_1_0
;     loadRegFromAop (a, EXT(_strrchr_string_1_1), 0)
	lda	(_strrchr_string_1_1 + 1)
;     storeRegToAop (a, DIR(_strrchr_sloc0_1_0), 0), stacked=0, isaddr=0
	sta	*(_strrchr_sloc0_1_0 + 1)
00101$:
;     genPointerGet
;     loadRegFromAop (hx, DIR(_strrchr_sloc0_1_0), 0)
	ldhx	*_strrchr_sloc0_1_0
	lda	,x
	aix	#1
;     storeRegToAop (a, DIR(_strrchr_sloc1_1_0), 0), stacked=0, isaddr=0
	sta	*_strrchr_sloc1_1_0
;     storeRegToAop (hx, DIR(_strrchr_sloc0_1_0), 0), stacked=0, isaddr=0
	sthx	*_strrchr_sloc0_1_0
;     genIfx
	tst	*_strrchr_sloc1_1_0
;     genIfxJump
; Peephole 2c	- eliminated jmp
	bne	00101$
00118$:
;_strrchr.c:36: while (--string != start && *string != ch)
;     genAssign
00105$:
;     genMinus
;     loadRegFromAop (a, DIR(_strrchr_sloc0_1_0), 0)
	lda	*(_strrchr_sloc0_1_0 + 1)
	sub	#0x01
;     storeRegToAop (a, DIR(_strrchr_sloc0_1_0), 0), stacked=0, isaddr=0
	sta	*(_strrchr_sloc0_1_0 + 1)
;     loadRegFromAop (a, DIR(_strrchr_sloc0_1_0), 1)
	lda	*_strrchr_sloc0_1_0
	sbc	#0x00
;     storeRegToAop (a, DIR(_strrchr_sloc0_1_0), 1), stacked=0, isaddr=0
	sta	*_strrchr_sloc0_1_0
;     genCmpEQorNE	(==)
;     loadRegFromAop (a, DIR(_strrchr_sloc0_1_0), 0)
	lda	*(_strrchr_sloc0_1_0 + 1)
	cmp	(_strrchr_start_1_1 + 1)
	bne	00119$
;     loadRegFromAop (a, DIR(_strrchr_sloc0_1_0), 1)
	lda	*_strrchr_sloc0_1_0
	cmp	_strrchr_start_1_1
; Peephole 2d	- eliminated jmp
	beq	00107$
00119$:
;     genPointerGet
;     loadRegFromAop (hx, DIR(_strrchr_sloc0_1_0), 0)
	ldhx	*_strrchr_sloc0_1_0
	lda	,x
;     storeRegToAop (a, REG(-,-,x,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
;     genCmpEQorNE	(==)
;     loadRegFromAop (a, REG(-,-,x,a), 0)
; transferRegReg(a,a)
	cmp	_strrchr_PARM_2
; Peephole 2c	- eliminated jmp
	bne	00105$
00120$:
00107$:
;_strrchr.c:39: if (*string == ch)                /* char found ? */
;     genPointerGet
;     loadRegFromAop (hx, DIR(_strrchr_sloc0_1_0), 0)
	ldhx	*_strrchr_sloc0_1_0
	lda	,x
;     storeRegToAop (a, REG(-,-,x,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
;     genCmpEQorNE	(==)
;     loadRegFromAop (a, REG(-,-,x,a), 0)
; transferRegReg(a,a)
	cmp	_strrchr_PARM_2
; Peephole 2c	- eliminated jmp
	bne	00109$
00121$:
;_strrchr.c:40: return( (char *)string );
;     genRet
;     loadRegFromAop (x, DIR(_strrchr_sloc0_1_0), 1)
	ldx	*_strrchr_sloc0_1_0
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, DIR(_strrchr_sloc0_1_0), 0)
	lda	*(_strrchr_sloc0_1_0 + 1)
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
; Peephole 3	- shortened jmp to bra
; Peephole 6b  - replaced jmp to rts with rts
	rts
00109$:
;_strrchr.c:42: return (NULL) ;
;     genRet
;     loadRegFromAop (x, LIT(#0x00), 1)
	clrx
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, LIT(#0x00), 0)
	clra
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
00110$:
	rts
	.area CSEG (CODE)
	.area CONST   (CODE)
	.area XINIT
