;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.6.1 #4330 (Oct 18 2006)
; This file generated Wed Oct 18 23:31:20 2006
;--------------------------------------------------------
	.module _strpbrk
	.optsdcc -mhc08
	
	.area HOME (CODE)
	.area GSINIT0 (CODE)
	.area GSINIT (CODE)
	.area GSFINAL (CODE)
	.area CSEG (CODE)
	.area XINIT
	.area CONST   (CODE)
	.area DSEG
	.area OSEG    (OVR)
	.area BSEG
	.area XSEG
	.area XISEG
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _strpbrk_PARM_2
	.globl _strpbrk
;--------------------------------------------------------
;  ram data
;--------------------------------------------------------
	.area DSEG
_strpbrk_ch_1_1:
	.ds 1
_strpbrk_sloc0_1_0:
	.ds 1
;--------------------------------------------------------
; overlayable items in  ram 
;--------------------------------------------------------
	.area OSEG    (OVR)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
	.area XISEG
;--------------------------------------------------------
; extended address mode data
;--------------------------------------------------------
	.area XSEG
_strpbrk_PARM_2:
	.ds 2
_strpbrk_string_1_1:
	.ds 2
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area HOME (CODE)
	.area GSINIT (CODE)
	.area GSFINAL (CODE)
	.area GSINIT (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME (CODE)
	.area CSEG (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'strpbrk'
;------------------------------------------------------------
;ch                        Allocated with name '_strpbrk_ch_1_1'
;sloc0                     Allocated with name '_strpbrk_sloc0_1_0'
;control                   Allocated with name '_strpbrk_PARM_2'
;string                    Allocated with name '_strpbrk_string_1_1'
;------------------------------------------------------------
;_strpbrk.c:26: char * strpbrk ( 
;	-----------------------------------------
;	 function strpbrk
;	-----------------------------------------
_strpbrk:
;     genReceive
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, EXT(_strpbrk_string_1_1), 0), stacked=0, isaddr=0
	sta	(_strpbrk_string_1_1 + 1)
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, EXT(_strpbrk_string_1_1), 1), stacked=0, isaddr=0
	stx	_strpbrk_string_1_1
;_strpbrk.c:33: while ( ch = *string ) {
00103$:
;     genPointerGet
;     loadRegFromAop (hx, EXT(_strpbrk_string_1_1), 0)
;     loadRegFromAop (a, EXT(_strpbrk_string_1_1), 1)
	lda	_strpbrk_string_1_1
;     loadRegFromAop (x, EXT(_strpbrk_string_1_1), 0)
	ldx	(_strpbrk_string_1_1 + 1)
; transferRegReg(a,h)
	psha
	pulh
	lda	,x
;     storeRegToAop (a, DIR(_strpbrk_ch_1_1), 0), stacked=0, isaddr=0
	sta	*_strpbrk_ch_1_1
;     genAssign
	mov	*_strpbrk_ch_1_1,*_strpbrk_sloc0_1_0
;     genIfx
	tst	*_strpbrk_ch_1_1
;     genIfxJump
; Peephole 2d	- eliminated jmp
	beq	00105$
00111$:
;_strpbrk.c:34: if (strchr (control, ch ))
;     genAssign
;     loadRegFromAop (a, DIR(_strpbrk_sloc0_1_0), 0)
	lda	*_strpbrk_sloc0_1_0
;     storeRegToAop (a, EXT(_strchr_PARM_2), 0), stacked=0, isaddr=1
	sta	_strchr_PARM_2
;     genCall
;     loadRegFromAop (x, EXT(_strpbrk_PARM_2), 1)
	ldx	_strpbrk_PARM_2
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, EXT(_strpbrk_PARM_2), 0)
	lda	(_strpbrk_PARM_2 + 1)
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
	jsr	_strchr
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, REG(-,-,x,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, REG(-,-,x,a), 1), stacked=0, isaddr=0
; transferRegReg(x,x)
;     genIfx
	tsta
	bne	00112$
	tstx
00112$:
;     genIfxJump
; Peephole 2d	- eliminated jmp
	beq	00103$
00113$:
; forgot to free a
;_strpbrk.c:35: return string ;
;     genRet
;     loadRegFromAop (x, EXT(_strpbrk_string_1_1), 1)
	ldx	_strpbrk_string_1_1
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, EXT(_strpbrk_string_1_1), 0)
	lda	(_strpbrk_string_1_1 + 1)
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
; Peephole 3	- shortened jmp to bra
; Peephole 6b  - replaced jmp to rts with rts
	rts
00105$:
;_strpbrk.c:38: return (NULL);
;     genRet
;     loadRegFromAop (x, LIT(#0x00), 1)
	clrx
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, LIT(#0x00), 0)
	clra
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
00106$:
	rts
	.area CSEG (CODE)
	.area CONST   (CODE)
	.area XINIT
