;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.6.1 #4330 (Oct 18 2006)
; This file generated Wed Oct 18 23:31:16 2006
;--------------------------------------------------------
	.module _strcmp
	.optsdcc -mhc08
	
	.area HOME (CODE)
	.area GSINIT0 (CODE)
	.area GSINIT (CODE)
	.area GSFINAL (CODE)
	.area CSEG (CODE)
	.area XINIT
	.area CONST   (CODE)
	.area DSEG
	.area OSEG    (OVR)
	.area BSEG
	.area XSEG
	.area XISEG
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _strcmp_PARM_2
	.globl _strcmp
;--------------------------------------------------------
;  ram data
;--------------------------------------------------------
	.area DSEG
;--------------------------------------------------------
; overlayable items in  ram 
;--------------------------------------------------------
	.area	OSEG    (OVR)
_strcmp_ret_1_1::
	.ds 2
_strcmp_sloc0_1_0::
	.ds 2
_strcmp_sloc1_1_0::
	.ds 2
_strcmp_sloc2_1_0::
	.ds 2
_strcmp_sloc3_1_0::
	.ds 2
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
	.area XISEG
;--------------------------------------------------------
; extended address mode data
;--------------------------------------------------------
	.area XSEG
_strcmp_PARM_2:
	.ds 2
_strcmp_asrc_1_1:
	.ds 2
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area HOME (CODE)
	.area GSINIT (CODE)
	.area GSFINAL (CODE)
	.area GSINIT (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME (CODE)
	.area CSEG (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'strcmp'
;------------------------------------------------------------
;adst                      Allocated with name '_strcmp_PARM_2'
;asrc                      Allocated with name '_strcmp_asrc_1_1'
;ret                       Allocated with name '_strcmp_ret_1_1'
;sloc0                     Allocated with name '_strcmp_sloc0_1_0'
;sloc1                     Allocated with name '_strcmp_sloc1_1_0'
;sloc2                     Allocated with name '_strcmp_sloc2_1_0'
;sloc3                     Allocated with name '_strcmp_sloc3_1_0'
;------------------------------------------------------------
;_strcmp.c:29: int strcmp (
;	-----------------------------------------
;	 function strcmp
;	-----------------------------------------
_strcmp:
;     genReceive
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, EXT(_strcmp_asrc_1_1), 0), stacked=0, isaddr=0
	sta	(_strcmp_asrc_1_1 + 1)
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, EXT(_strcmp_asrc_1_1), 1), stacked=0, isaddr=0
	stx	_strcmp_asrc_1_1
;_strcmp.c:48: while( ! (ret = *(unsigned char *)asrc - *(unsigned char *)adst) && *adst)
;     genAssign
;     loadRegFromAop (a, EXT(_strcmp_asrc_1_1), 1)
	lda	_strcmp_asrc_1_1
;     storeRegToAop (a, DIR(_strcmp_sloc0_1_0), 1), stacked=0, isaddr=0
	sta	*_strcmp_sloc0_1_0
;     loadRegFromAop (a, EXT(_strcmp_asrc_1_1), 0)
	lda	(_strcmp_asrc_1_1 + 1)
;     storeRegToAop (a, DIR(_strcmp_sloc0_1_0), 0), stacked=0, isaddr=0
	sta	*(_strcmp_sloc0_1_0 + 1)
;     genAssign
;     loadRegFromAop (a, EXT(_strcmp_PARM_2), 1)
	lda	_strcmp_PARM_2
;     storeRegToAop (a, DIR(_strcmp_sloc1_1_0), 1), stacked=0, isaddr=0
	sta	*_strcmp_sloc1_1_0
;     loadRegFromAop (a, EXT(_strcmp_PARM_2), 0)
	lda	(_strcmp_PARM_2 + 1)
;     storeRegToAop (a, DIR(_strcmp_sloc1_1_0), 0), stacked=0, isaddr=0
	sta	*(_strcmp_sloc1_1_0 + 1)
00102$:
;     genPointerGet
;     loadRegFromAop (hx, DIR(_strcmp_sloc0_1_0), 0)
	ldhx	*_strcmp_sloc0_1_0
	lda	,x
;     storeRegToAop (a, REG(-,-,x,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
;     genCast
;     loadRegFromAop (a, REG(-,-,x,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, DIR(_strcmp_sloc2_1_0), 0), stacked=0, isaddr=0
	sta	*(_strcmp_sloc2_1_0 + 1)
	clr	*_strcmp_sloc2_1_0
; forgot to free a
;     genPointerGet
;     loadRegFromAop (hx, DIR(_strcmp_sloc1_1_0), 0)
	ldhx	*_strcmp_sloc1_1_0
	lda	,x
;     storeRegToAop (a, REG(-,-,x,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
;     genCast
;     loadRegFromAop (a, REG(-,-,x,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, DIR(_strcmp_sloc3_1_0), 0), stacked=0, isaddr=0
	sta	*(_strcmp_sloc3_1_0 + 1)
	clr	*_strcmp_sloc3_1_0
; forgot to free a
;     genMinus
;     loadRegFromAop (a, DIR(_strcmp_sloc2_1_0), 0)
	lda	*(_strcmp_sloc2_1_0 + 1)
	sub	*(_strcmp_sloc3_1_0 + 1)
;     storeRegToAop (a, DIR(_strcmp_ret_1_1), 0), stacked=0, isaddr=0
	sta	*(_strcmp_ret_1_1 + 1)
;     loadRegFromAop (a, DIR(_strcmp_sloc2_1_0), 1)
	lda	*_strcmp_sloc2_1_0
	sbc	*_strcmp_sloc3_1_0
;     storeRegToAop (a, DIR(_strcmp_ret_1_1), 1), stacked=0, isaddr=0
	sta	*_strcmp_ret_1_1
;     genAssign
	mov	*_strcmp_ret_1_1,*_strcmp_sloc3_1_0
	mov	*(_strcmp_ret_1_1 + 1),*(_strcmp_sloc3_1_0 + 1)
;     genIfx
;     loadRegFromAop (a, DIR(_strcmp_ret_1_1), 0)
	lda	*(_strcmp_ret_1_1 + 1)
	ora	*_strcmp_ret_1_1
;     genIfxJump
; Peephole 2c	- eliminated jmp
	bne	00104$
00111$:
;     genPointerGet
;     loadRegFromAop (hx, DIR(_strcmp_sloc1_1_0), 0)
	ldhx	*_strcmp_sloc1_1_0
	lda	,x
;     genIfxJump
; Peephole 2d	- eliminated jmp
	beq	00104$
00112$:
;_strcmp.c:49: ++asrc, ++adst;
; checking lic
; checking IS_ITEMP
; pset=0, pget=0
;     genPlus
; IS_AOP_HX = 0
;     loadRegFromAop (hx, DIR(_strcmp_sloc0_1_0), 0)
	ldhx	*_strcmp_sloc0_1_0
	aix	#1
;     storeRegToAop (hx, DIR(_strcmp_sloc0_1_0), 0), stacked=0, isaddr=0
	sthx	*_strcmp_sloc0_1_0
; checking lic
; checking IS_ITEMP
; pset=0, pget=0
;     genPlus
; IS_AOP_HX = 0
;     loadRegFromAop (hx, DIR(_strcmp_sloc1_1_0), 0)
	ldhx	*_strcmp_sloc1_1_0
	aix	#1
;     storeRegToAop (hx, DIR(_strcmp_sloc1_1_0), 0), stacked=0, isaddr=0
	sthx	*_strcmp_sloc1_1_0
; Peephole 3	- shortened jmp to bra
	bra	00102$
00104$:
;_strcmp.c:51: return( ret );
;     genRet
;     loadRegFromAop (x, DIR(_strcmp_sloc3_1_0), 1)
	ldx	*_strcmp_sloc3_1_0
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, DIR(_strcmp_sloc3_1_0), 0)
	lda	*(_strcmp_sloc3_1_0 + 1)
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
00105$:
	rts
	.area CSEG (CODE)
	.area CONST   (CODE)
	.area XINIT
