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Extensions |
Previous | The A68k Assembler | Next |
Now for the good stuff:
(TIGCC) | The maximum has been increased from 127 to 256 (for Win32, starting from 2.71.F3a, for GNU/Linux, starting from 2.71.F3c, for all other platforms, starting from 2.71.F3s). |
'@'
if the next character
is not numeric (this avoids confusion with octal constants).
This provides compatibility with the Lattice C compiler.
INCLUDE
s and macro calls can be nested indefinitely, limited
only by available memory. The message "Secondary heap
overflow - assembly terminated" will be displayed if memory
is exhausted. You can increase the size of this heap using
the '-w' switch (see below). Recursive macros are supported;
recursive INCLUDE
s will, of course, result in a loop that
will be broken only when the heap overflows.
EVEN
directive forces alignment on a word (2-byte)
boundary. It does the same thing as CNOP 0,2
(this one is left over from the original code).
CODE
section
will be converted to PC-relative addressing with displacement
if this mode is legal for the instruction. This feature is
disabled by the '-n' switch.
MOVEM
instruction only specifies one register, it is
converted to the corresponding MOVE
instruction. Instructions
such as MOVEM D0-D0,label
will not be converted, however.
This feature is disabled by the '-n' switch.
(TIGCC) | Starting from v.2.71.F3c, this feature can now also be disabled by using the '-rm' switch. |
ADD
, SUB
, and MOVE
instructions will be converted to
ADDQ
, SUBQ
, and MOVEQ
respectively if possible.
Instructions coded explicitly (e.g. ADDA
or ADDI
) will not be converted. This
feature is disabled by the '-n' switch.
ADD
, CMP
, SUB
, and MOVE
to an address register are
converted to ADDA
, CMPA
, SUBA
, and MOVEA
respectively, unless (for ADD
, SUB
, or MOVE
)
they have already been converted to quick form.
ADD
, AND
, CMP
, EOR
, OR
, and
SUB
of an immediate value are
converted to ADDI
, ANDI
, CMPI
, EORI
,
ORI
, and SUBI
respectively (unless the address register or quick
conversion above has already been done).
(TIGCC) |
Starting from v.2.71.F3c, ADDA and SUBA (or ADD and SUB
to an address register) will now be converted to LEA if
possible. This feature can be disabled using the '-n'
switch (disables all optimizations) or the '-ra' switch
(disables just this single optimization). |
(TIGCC) |
Starting from v.2.71.F3c, LEA n(an),an will now be converted to ADDQ or SUBQ if
possible. This feature can be disabled using the '-n'
switch (disables all optimizations) or the '-rl' switch
(disables just this single optimization). |
CMP
instruction are postincrement mode,
the instruction is converted to CMPM
.
'0(An)'
will be treated as '(An)'
except for
the MOVEP
instruction, which always requires a displacement.
This feature is disabled by the '-n' switch.
SECTION
directive allows a third parameter. This can be
specified as either CHIP
or FAST
(upper or lower case). If
this parameter is present, the hunk will be written with the
MEMF_CHIP
or MEMF_FAST
bit set. This allows you to produce
"pre-ATOMized" object modules.
DATA
and BSS
are accepted for SECTION
directives
starting data or BSS
hunks. The CHIP
and FAST
options (see
above) can also be used, e.g. BSS name,CHIP
.
CSEG
is treated the same as CODE
or SECTION name,CODE
.
DSEG
is treated the same as DATA
or SECTION name,DATA
.
PUBLIC
is treated as either XDEF
or XREF
, depending on
whether or not the symbol in question has been defined in the current source module.
A single PUBLIC
directive can name a mixture of internally- and externally-defined symbols.
INCLUDE
file, the position of the macro
call or INCLUDE
statement in the outer module is given as
well. This process is repeated until the outermost source
module is reached.
Next, the offending source line itself is listed.
Finally, the errors for that line are displayed. A flag
'^'
is placed under the column where the error was detected.
nnn$
) but
are formed in the same manner as normal labels, except that
they must be preceded by a backslash ('\'
).
ENDIF
is treated the same as ENDC
.
'='
is treated the same as EQU
.
'|'
is treated the same as '!'
(logical OR).
"
) can be used as string delimiters
as well as apostrophes ('
). Any given string must begin
and end with the same delimiter. This allows such statements
as the following:
MOVEQ "'",D0 DC.B "This is Charlie's assembler."Note that you can still define an apostrophe within a string delimited by apostrophes if you double it, e.g.
MOVEQ '''',D0 DC.B 'This is Charlie''s assembler.'
.A68K
, .a68k
, .a68K
, and .A68k
are automatically
defined as SET
symbols having absolute values of 1.
This enables a source program to determine whether it is
being assembled by this assembler, and is effectively
insensitive as to whether or not it is checked in upper case.
'\0'
is supported. It
is replaced by the length of the macro call (B
, W
, or L
,
defaulting to W
). For instance, given the macro:
moov MACRO move.\0 \1,\2 ENDMthe macro call
moov.l d0,d1would be expanded as
move.l d0,d1
INCLUDE
file doesn't generate any code and no listing
file is required (including suppression of the listing using
NOLIST
), it won't be read again in pass 2. The statement
numbers will be bumped to keep in proper alignment. This
can really speed up assemblies that INCLUDE
lots of EQU
ates.
ORG
directive is supported. It works like RORG
, except
that it takes the actual address to be jumped to, rather
than an offset from the start of the current section.
The given address must be in the current section.
As far as A68k is concerned, the only real difference
between ORG
and RORG
is that the ORG
value must be
relocatable, while the RORG value must be absolute.
Bcc
, including BRA
and BSR
) instructions will be
converted to short form if possible. Shortening a branch
may bring other branches within range of shortening - this
can set up a ripple effect, and A68k may not catch all
branches that could theoretically be optimized. Any branches
which A68k misses (there shouldn't be too many under normal
circumstances) can be displayed by specifying the '-f' switch
(see below). Branch optimization is disabled by the '-n' switch.
INCBIN
directive allows the contents of any file to be
included in A68k's object code output. Its format is the same
as the INCLUDE
directive, but the file can contain any data
at all, printable or not. Rather than being processed as
source code by the assembler, the entire contents of the file
is copied directly to the current position in the object code
output file with no reformatting whatsoever. The effect is
the same as if DC
statements whose constants represent the
file's contents were inserted in place of the INCBIN
directive.
TTL
is accepted as a synonym for TITLE
.
XREF
.
MOVEM
instruction can be an
immediate operand which specifies the actual mask bits.
(TIGCC) |
The following synonyms are also supported: Starting from 2.71.F3a:
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